Error Recovery using Forced Validity Assisted by Executable Assertions for Error Detection: An Experimental Evaluation

This paper proposes and evaluates error detection and recovery mechanisms suitable for embedded systems. The purpose of these mechanisms is to provide detection of and recovery from data errors in internal variables. A classification scheme for variables enables us to construct a parameterised detection and recovery mechanism for each variable. Error detection is handled by executable assertions and recovery is attempted by forcing an erroneous variable into the valid domain of that variable. The effect on failure probability from some of the proposed mechanisms is evaluated in an error injection experiment targeting an embedded system. Errors were injected into the original system without mechanisms as well as into an instrumented system. Results show that the failure probability decreased most for errors in monitored variables and very little for errors in variables that were not directly monitored. For errors in the stack and CPU registers, no significant change was observed.